{5} Assigned, Active Tickets by Owner (Full Description) (39 matches)

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rutger (39 matches)

Ticket Summary Component Milestone Type Created
Description
#8 Refactor the 13.56MHz tag rcvr device component1 Basic MRG software for RadioTuna defect 11/23/07

The 15693 tag rcvr device must be refactored. It interleaves all kinds of protocols:

  • 15693 1-oo-4
  • 15693 1-oo-256, polling
  • 15693 1-oo-256, interrupt-only
  • 14443A
  • 14443B

These must be torn apart into separate files, and one common module to poll the input pin.


#143 Use the Extended Interrupt system component1 Port of eCos/BFin to RadioShark-547 defect 01/05/10

BlackFin eCos has 2 interrupt handling systems: # the simple system where each CEC IVG is used by at most one peripheral interrupt # the Extended System where multiple peripheral interrupts may share one CEC IVG. In that case, the interrupt multiplexing is handled by the HAL

There are 7 (or 8) mappable IVG interrupts. A quick count reveals somewhere between 8 and 12 peripheral interrupts in RadioTuna. To be future-proof, the Extended System must be used. We must also check whether a fastpath is feasible/necessary for IVGs that have just one peripheral, like the critical RFID Receive Device interrupt.


#42 Program FPGA from CPU component1 Basic MRG software for RadioTuna enhancement 12/13/07

After each power-down, the FPGA program must be reloaded. We must do this from the CPU. (For debugging the FPGA, using a PC JTAG cable is fine.)

Parts:

  • Intel PXA270 or BlackFin
  • Altera Cyclone II FPGA, ep2c8t114; or newer Altera on RFC40

The FPGA is programmed through an SVF script generated with an Altera tool.

Tools: openwince JTAG, which is badly maintained, or UrJtag, which tries to take over maintenance from openwince, or the branch of UrJtag at uCLinux/BlackFin. 'Abbreviate': [OW|Ur]Jtag. There is a patch to play SVF files in [OW|Ur]Jtag.

Steps:

  • configure, patch, run [OW|Ur]Jtag. Done by 11 dec 07; not done for RFC40
  • patch CPU into [OW|Ur]Jtag, if it is on the same JTAG chain. Create description for FPGA from Altera BSDL. Done by 13 dec 07; not done for RFC40
  • test [OW|Ur]Jtag via PC serial cable. detect works 14 dec 07;
  • test SVF via PC serial cable;
  • create backend to use GPIO pins to drive the JTAG lines on V3; this amounts to creating a new [OW|Ur]Jtag 'cable'; done in 07;
  • port [OW|Ur]Jtag to a library to fit into MRG;
  • decide where we will generate JTAG line manipulation commands: off-line or on the PXA270. Pros/Cons:
    • off-line: must think up a little language to describe JTAG line commands, incl timings
    • off-line: generate and parse this little language
    • off-line: trust that detection and part selection works without any change <-- this bothers me
    • on-line: need to include the SVF parser/player and the complete [OW|Ur]Jtag library into MRG; this is no problem because there is a file system on the Guardian.
  • Current preference is for the last option;
  • the fastest development track? No idea. Sorry.

#33 Check ACL save and diff component1 Basic MRG software for RadioTuna defect 11/23/07

#123 UI file upload/download needs an extra network pass component1 Basic MRG software for RadioTuna defect 10/06/09

Right now, ui/stdin does upload/download directly from the stdin UI handler. It should assemble the file and send it to the impl. Think of a stdin UI over ethernet on a separate host.


#130 eCos BBT compatibility with MTD component1 eCos NAND Flash and YAFFS defect 10/22/09

I must check if BBT for eCos NAND and for u-boot MTD are compatible, and if not, patch eCos NAND.


#132 Upgrade synth and NFC_GPIO component1 eCos NAND Flash and YAFFS defect 10/23/09

#136 Optimize and prioritize GPIO interrupt handling component1 Basic MRG software for RadioTuna defect 11/26/09

Now, all GPIOs share one interrupt, and all interrupt sources are queried for a GPIO interrupt (in MRG). Prioritize the interrupts, and optimize at the same time: let high prio GPIO interrupts (RFID receive) map to an interrupt level, and share the low-level GPIO interrupts at some lower interrupt level.


#137 yaffs in u-boot and eCos component1 bootloader for RadioShark-547 defect 11/26/09

On BF548 EZ-Kit, the YAFFS device generated by eCos was recognized by u-boot. At the first glance, that seems to be different for RadioTuna u-boot and eCos.


#139 Immediate UI still creates a UI impl thread component1 Basic MRG software for RadioTuna defect 11/27/09

Is that necessary? The application thread can call the stdin UI, which can call the UI impl directly.

  • remove that thread

#72 Port eCos to RadioShark-547 component1 Port of eCos/BFin to RadioShark-547 enhancement 07/07/08

Based on port to EZ-Kit BF548 and U-Boot port to RadioShark-547.

Basic devices needed:

  • memory (128MB) (inherit 64MB from BF548-EZKit)
  • serial (BF548-EZKit has no RTS/CTS)
  • Ethernet (AX88796B i.s.o. SMC, different intpt)
  • RTC (inherit)
  • Watchdog (inherit?)

#75 Add FPGA interface to BFin eCos component1 Basic MRG software for RadioTuna enhancement 07/07/08

The FPGA is used to drive all AFEs. It is accessed through a number of MMRs.

* write generic driver code to access these MMRs * port the RFID device drivers to use the MMR interface


#91 BlackFin: Put critical code and data into L1 or L2 memory component1 Port of eCos/BFin to RadioShark-547 enhancement 12/11/08

The XScale had a postprocessing phase to lock critical code and data into the caches. For the BlackFin, I guess some gcc annotations are necessary in the code.

Notes:

  • is L1 memory alone sufficient, or do we desperately need L2?
  • can we come up with a unified scheme that can handle both approaches: postprocessing and annotation?
  • L1 annotation is fairly common. Find out about L2 annotation.

#70 Get U-Boot ported to RadioShark-547 component1 bootloader for RadioShark-547 task 07/07/08

Working:

  • 64MB memory
  • UART1 (incl RTS/CTS)
  • Ethernet -- but still bugs (corrupt packet handling)
  • RTC
  • NAND incl booting from NAND

To be added:

  • TFT screen -- maybe. Maybe in eCos
  • Touchscreen -- maybe. Maybe in eCos

Not working: * UART1 boot on RFB40 revB * 128MB memory * USB host


#83 eCos NAND Flash Package component1 eCos NAND Flash and YAFFS task 11/03/08

Current eCos has no support for NAND Flash.

We wrote a package for that. It will harbour:

  • a NAND flash chip package

chips differ in their interrogation, in factory-bad marks

  • a NAND flash controller package

NAND flash requires a controller.

+ The BlackFin has an on-board controller. + Provide a template GPIO controller

  • an Abstract NAND Chip package that hides the presence of multiple (heterogeneous) controllers and multiple (heterogeneous) chips

Work started in september, around the date of Melanie's PhD Defence.


#84 YAFFS on eCos NAND Flash component1 eCos NAND Flash and YAFFS task 11/03/08

YAFFS claims it is really easy to port. A port to eCos will include:

  • an interface layer between the eCos FS (File System) layer and YAFFS
  • an interface layer between YAFFS and eCos NAND Flash

Work on this has started on oct 8, 2008.


#9 mrg errno must be glocal component1 Extended MRG or eCos software for RadioTuna defect 11/23/07

mrg errno currently is global. It must be glocal, with a mechanism to transfer error status between client and server threads.


#61 GPIO numbers constants? component1 defect 04/28/08

When reading/writing GPIO pins, shouldn't their number/address be a compile-time constant? Deriving the address from the number involves a bit of calculation. Or would this introduce uncacheable constants?


#63 Do something about the identifier 'name space' in Blackfin eCos component1 Port of eCos/BFin to RadioShark-547 defect 06/24/08

#79 Talk to Andre Liesk about interrupt model component1 Port of eCos/BFin to RadioShark-547 defect 07/09/08

I wonder if the Liesk's BlackFin eCos interrupt model is unnecessarily complicated. I should talk to him about this.


#82 Talk to Andre Liesk about BlackFin eCos cache replacement strategy component1 Port of eCos/BFin to RadioShark-547 defect 08/26/08

Now, it's round-robin. My guess is that it is easy to replace it with LRU (maybe even by disabling the custom strategy).


#93 Add multiple current readers component1 defect 12/11/08

Some protocols support multiple current readers. Need to add that to the UI and to the ACL. My guess is, adding it to the ACL will be a small extension because of the role model: roles that can be assumed by a set of readers i.s.o. roles that can be assumed by one reader.


#96 replace XYZmodem implementation in MRG component1 Extended MRG or eCos software for RadioTuna defect 12/20/08

Currently, XYZmodem (to be honest: XYmodem) in MRG is a copy from eCos. Xmodem has a bug. Zmodem is unimplemented.

I'd like to replace XYZmodem with some other implementation, like legacy lrzsz (from 1999!).

I already add tftp, to follow the same command interface UI> upload -t remotefile localfile


#98 Update SW tutorial on the web site for BFin component1 Basic MRG software for RadioTuna defect 12/21/08

The tutorial is now focused on the PXA. Update it for the Guardian: - toolchain - eCos build - MRG configure


#104 Sync flash disk component1 Basic MRG software for RadioTuna defect 01/10/09

Add:

  • (f)sync command to browser
  • do sync after write operations (complete files?)
  • do sync from "cron"

#111 Understand and fix BlackFin DMA component1 Extended MRG or eCos software for RadioTuna defect 07/24/09

My attempts at using simple memory->memory DMA have failed miserably until now. Understand and fix.


#113 Can we use linker directives for hal_virtual_vector_table and friends? component1 Port of eCos/BFin to RadioShark-547 defect 08/18/09

Currently hal_virtual_vector_table is explicitly set to 0xFF803000 in arch/current/src/bfin.ld. Would it be possible, and wouldn't it be better to use a linker directive to put it anywhere in the L1.data.A segment? Also, there may be other identifiers that have explicit linkage for which the same refactoring would be appropriate.


#119 Document semantic requirements in ACL language refman component1 defect 10/01/09

#120 turn ACL algorithm page into something readable component1 defect 10/01/09

#127 extend mounting so mount points appear in the root tree etc component1 Basic MRG software for RadioTuna defect 10/10/09

If I have fs'es / and /boot, I would want /boot to appear in the listing of /. It doesn't. I can even make a directory /boot in the root tree, I guess.


#138 Configure NAND nCE to auto, remove nCE manipulation from driver component1 eCos NAND Flash and YAFFS defect 11/27/09

BlackFin's NAND NFC can automatically handle NAND nCE if so configured, and if there is only one NAND chip.

  • configure NAND nCE auto
  • update eCos Bfin NFC driver to remove all things nCE

#15 Anticollision must use smart collision report component1 Basic MRG software for RadioTuna enhancement 11/23/07

The Pegoda reader handles collisions rather intelligently: data is kept right until the place where the collision occurs. This allows faster/smarter anticollision. This is required behaviour for 14443-A anyway.

Our MRG reader implementation doesn't make use of this information. We want it, though.


#62 bfin ecos assembly component1 Port of eCos/BFin to RadioShark-547 enhancement 06/24/08

Check if it's possible to use LINK/UNLINK in the eCos assembly routines


#68 BlueTooth for BF component1 Port of eCos/BFin to RadioShark-547 enhancement 07/04/08

Can we use UART1 on the STAMP-537 for the LinkMatic? Its pin-out seems to require 2 headers, one for power, TX, RX, and one for ESC, ATT, ...


#85 Make a 'shell' for eCos NAND flash component1 eCos NAND Flash and YAFFS enhancement 11/28/08

Need an interactive utility to handle NAND flash, a bit like u-boot's nand command


#87 USB slave on RadioTuna component1 Extended MRG or eCos software for RadioTuna enhancement 11/28/08

Need 2 or 3 parts:

  • USB slave in u-boot? Why?
  • USB slave in eCos. There is lots of USB slave.
  • USB master in eCos. Problem: eCos has no USB master stack.

#107 Add Ethernet to RadioTuna eCos component1 Port of eCos/BFin to RadioShark-547 enhancement 03/23/09

It's an NE2000 compatible, so it should be doable


#92 Integrate Crapto into Guardian component1 Basic MRG software for RadioTuna task 12/11/08

Grabbed crapto1 from the web. Made a wrapper for it so it can interface with our filter framework. It has the 64-bit attack and the multi-32-bit attack.

ToDo:

  • make a UI for the attacks. Things are integrated into the MiFare spoofer, but the user will want to interact. Currently there is a hook to collect the authentication trace -- this might be sufficient to build a UI on
  • think of a callback to the UI to report on authentication attempts

#102 Let the specialized os/ecos/xscale/serial code use the generic console component1 Software for the XScale defect 12/27/08

This little module duplicates lots of the code in console. Move it away.


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